>>34173
>add/subtract takes 1/2 clock
look at this dumbass that doesnt even know the difference between latency and throughput, the instruction cycle is a minimum of 1 (instruction) cycle how the fuck can you have a fraction its only the repeat phase of the cycle that can be done in fractions and must wait if it ends before the next cycle begins and how stupid are you that you dont understand simple explanations and just keep dribbling nonsense instead of learning something you clearly have zero understanding of
this is the stupid mul as asm with dependencies marked
0: AND a, 0x7fffffff
AND b, 0x80000000
AND c, 0x7fffffff
AND d, 0x80000000
1: XOR (0:)b, (0:)d
ADD (0:)a, (0:)c
2: SUB (1:)a, 0x3f780000
3: AND (2:)a, 0x7fffffff
4: ADD (3:)a, (1:)d
this takes a minimum of 5 cycles because of the
data dependencies how much more obvious can it be, youre just stupid and dont understand and then get mad calling other people stupid lol, its embarassing someone that pretends to know computers doesnt even know or understand the simplest of things, and i already said the paper wasnt about a software implementation so none of this is even relevant, only a complete moron would think to do this in software thats why i didnt bother reading it at first until i realizd its not about a software implementation
>wrong
>wikipedia page
thats when you know youre talking to an idiot like omg, thats literally what i said dumbass thats not a gate its a circuit the actual
LOGIC gates are a single component look at the schematic you cretin, its literally showin you addition done using ^ and &
>>34175
then do it, give me the calculation lmao and show me how its better than whats in current hardware
>i have a bigger house than all of you
<youve never seen my house or theirs
>yeah but its 80% smaller
<how would you know
>cuz i know the size of my house duh!
<but you dont know the others
>yeah i do cuz its 80% smaller than mine and i know mine so yours are [math] boom! Facts& & Logic
is there a name for these kinds of geniuses
>>34176
>Here's a picture of a NVIDIA GPU processor
is this a joke obviously each one of those (16*8) processors has to have an fpu, i said how good are they and whats the actual precision compared to a cpu, as if anyone would complain their pixel coord is 24.84993023 and not 24.885475235, if it was as precise as a cpu it wouldnt give you different rounding errors when you compare the result from both, youre just stupid fpu is a generic term like alu mmu gpu cpu etc.
u it doesnt mean anything outside of what it means
>thinks im talking about the paper
im taking about nvidea, give me a single isa or any documentation on their architectures and then send it to the nouveau project devs
>WOW
yeah pretty much, i have to explain everything to you cuz you clearly dont know even the basic things, thats the crux of every stupid post you make its literally nothing more than a complete failure in understanding basic concepts
>sticks, rocks and random cats
its even simpler really, atan is implemented in hardware in intels x87 using nothing more than than and only nand gates, its their bigget propriatary secret since nands are so cheap and its why they sued cyrix when they got undercut on their math chip
youre so nauseating you just post shotgun drivel making stupid nonsensical remarks on things you clearly dont know anything about